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Invited Speakers
High performance and programmable packet processing and the role of hardware acceleration
Sandor Albrecht, PhD
Director, IP and Transport
Ericsson Research

Today, rigid network control limits the flexibility of service creation.  The infrastructure required to transport data from a storage center to an end user is presently fragmented and inflexible. Reconfiguring any part of the network often requires programming physical hardware on location, making upgrades costly and time consuming. A response to this problem is the emergence of Software Defined Networking (SDN), which, in simple terms, shifts control of a network from hardware to software. This virtualization allows for more flexible reprogramming of network elements, increasing speed and the potential for innovation.This invited talk addresses challenges and presents initial results related to the trade-off of dataplane programmability vs. high performance. Initial results are presented on how use-case influences the performance of various dataplane chips, then early results are presented on what a software based packet forwarding engine could be capable of on generic purpose hardware together with a bottleneck analysis.

Sandor Albrecht received his M.Sc.E.E. and Ph.D. from Budapest University of Technology and Economics in 1993 and 2004, respectively. He also received a M.A.Sc. from the University of British Columbia, Vancouver, BC, Canada in 1998 and a MBA from Central European University Business School, Budapest, Hungary in 2009.Between 1993 and 1998, he participated in several digital signal processing and radar imaging related research and development project as a researcher and software developer in Hungary and Canada. He joined
Ericsson Research and Development in Hungary in 1999, where he worked as a manager leading software development projects and departments. He was responsible for four different product development areas, such as SmartEdge (Multi-Service Edge Router), Mobile Media Gateway, IMS Gateway and Telephony Softswitch Gateway Controller.He moved to Stockholm in 2010 and joined the IP and Broadband Design Unit. His main responsibility was to define and manage the Ericsson wide technology strategy for IP and packet transport evolution.Since March 2013, he is the Director of IP and Transport at Ericsson Research. His research area covers optical HW research, optical networking, small cell transport, SDN, network abstraction and service programmability, high performance and programmable data plane and information centric networking.
Energy Aware Computer Systems and Networks
Erol Gelenbe, PhD
Intelligent Systems and Networks Group
EEE Dept., Imperial College London, UK

ICT is becoming one of the main culprits for CO2 emissions, already on a par with air travel since 2007. Energy consumption by ICT is estimated to increase by 4% a year, despite the increasing energy efficiency of electronic and computer equipment, due to the ever increasing usage of computers and telecommunications. On the positive side, ICT offers the potential to manage energy more efficiently, help better match energy supply and demand, and dynamically substitute renewable energy sources in the place of fossil fuels. At the same time, one would like to think that ICT is saving energy and CO2 emissions in other areas (such as transport), by substituting on-line activities for physical activities, such as working at home rather than commuting to an office. But such trends are difficult to identify, while the recent economic crisis in Europe and the USA has definitely had an impact on energy consumption in industry and other fields of activity. Within ICT itself, communications represent close to 25% of energy consumption, with data centres accounting for another 20% or so, the rest being attributed to PCs, terminal devices and office equipment including local networks. This lecture will focus on the ICT aspects of energy consumption from a performance engineering perspective, and show how some of our established methods, with measurements, can be used to understand the trade-offs between QoS and energy consumption, and help reduce the energy consumption in servers and networks.

A Fellow of IEEE, ACM and IET, and an expert on the performance evaluation of computer systems and networks, Erol Gelenbe is the Professor in the Dennis Gabor Chair in the Department of Electrical and Electronic Engineering at Imperial College, London. His research has been incorporated into commercial software tools such as QNAP for system performance evaluation and FLEXSIM for manufacturing systems. He has invented new mathematical models for performance analysis such as G-networks and diffusion approximations, and designed the first random access fiber-optics network
XANTHOS and the first multi-processor packet switch SYCOMORE. He currently coordinates the EU FP7 Project NEMESYS on mobile network security, and also works on the interaction between energy savings and performance in Cloud Computing and ICT. Erol is a Fellow of the French National Academy of Engineering, and of the Hungarian, Polish and Turkish Science Academies, and has won the ACM SIGMETRICS Life-Time Achievement Award (2008), and IET’s (UK) Oliver Lodge Medal for his work.
The Association for Computing Machinery, the world’s largest professional society in Computer Science and Computer Engineering, announced the selection of Professor Erol Gelenbe of the Department of Electrical and Electronic Engineering, as the recipient of the 2008 ACM SIGMETRICS Achievement Award, and described Erol as “the single individual who, over a span of 30 years, has made the greatest overall contribution to the field of Computer System and Network Performance Evaluation through original research, mentoring and doctoral training, creation and direction of world class research groups, wide ranging international collaboration, and professional service”. The announcement also states that Erol “has made decisive contributions to product form networks by inventing G-networks (Gelenbe-Networks) with totally new types of negative customers, triggers, and resets ..  characterized by non-linear traffic equations”. It also cites his “seminal contributions to random access communications, the optimisation of reliability in database systems, the design of adaptive QoS-aware packet networks, diffusion models in performance analysis, and the performance of link control protocols”. The prize includes a monetary award and the keynote lecture at the ACM SIGMETRICS annual conference on 3rd June in Annapolis, USA.
For further information see
Error correcting codes in telecommand and telemetry for European Space Agency missions: an overview and new perspectives
Franco Chiaraluce, PhD
Department of Information Engineering
Polytechnic University of Marche, Ancona, Italy

Error correcting codes have always played a prominent role in the definition of secure and reliable space missions. Both telecommand (TC) and telemetry (TM) have benefitted by the introduction of suitable co/decoding schemes, ranging from classic BCH, Reed-Solomon and convolutional codes to more recent state-of-the art codes based on soft-decision and iterative decoding. As a matter of fact, space TM was one of the first scenarios to propose implementation of the concept of turbo coding that, since twenty years, has traced a new paradigm in the field of error correction. At present the scene is dominated by low-density parity-check (LDPC) codes and these are being progressively included in the design of future missions, in either deep space or near Earth scenarios, for the advantage they offer in terms of increased data rate and reduced signal-to-noise ratios. The European Space Agency (ESA) is very active in the field and continuously gives relevant contributions to the standardization activities within the Consultative Committee for Space Data Systems (CCSDS). The talk will provide an overview of the error correcting codes included in the current TC and TM recommendations and will discuss the new solutions recently proposed in view of most demanding missions, also able to operate in hostile environments like, for example, in the presence of jamming.

Franco Chiaraluce is an Associate Professor at the Department of Information Engineering of the Polytechnic University of Marche, Ancona, Italy, where he is in charge of several courses in the area of Telecommunications. Since 2007 to 2008 he was the vice-director of the Department of Electronics, Artificial Intelligence and Telecommunications of the same university. Since 2008 he is a member of the Committee of the PhD school in "Engineering Science" and coordinator of some PhD Courses. His research interests are focused on error correcting codes, physical layer security and cryptography. 
He is co-author of more than 250 scientific papers, 2 books and co-inventor of 2 patents on code-based cryptography. Since many years, he cooperates with the European Space Agency (ESA) on research activities concerning error correcting codes for space applications. He also contributes, on behalf of ESA, to the standardization issues promoted by the Consultative Committee for Space Data Systems (CCSDS).
High speed software networking and virtual machines
Luigi Rizzo, PhD
Universitą di Pisa, Italy

This talk will give a survey of solutions -- and especially, discuss the underlying design principles -- that we developed in recent years to achieve extremely high packet processing rates in commodity operating systems, for both bare metal and virtual machines. Our NETMAP framework, opensource and BSD licensed, supports multiple operating systems and network devices (NICs) without relying on any special hardware feature. By leveraging batching, architectural simplifications and cost amortisation, NETMAP and its companion software switch VALE can process minimum-size frames from user space at over 45 Mpps on both NICs (up to 40 Gbit/s) and virtual ports. A libpcap library provides binary compatibility with existing software. Virtual machine support based on netmap has been added to multiple hypervisors (Qemu, Xen, bhyve) providing guests with packet rates comparable to those available on bare metal.

Luigi Rizzo is a Professor of Computer Engineering at the Universitą di Pisa, Italy,  doing​  research on computer networks and operating systems. H e has done some highly cited work on multicast ​ ​ congestion control, FEC-based reliable multicast, network emulation, packet scheduling, fast network I/O, virtualization. Much of his work has been implemented and deployed in popular operating systems and applications, and widely used by the research community. His contributions include the popular dummynet network emulator; one of the first publicly
available erasure code for reliable multicast; the ​QFQ  packet scheduler; and the netmap framework. Luigi has been a visitor at several industrial and research ​ ​ institutions, including ICSI (UC Berkeley), Intel Research Cambridge ​ ​ (UK), Intel Research Berkeley, and Google Mountain View. ​He has ​ been General Chair for SIGCOMM 2006, TPC Co-Chair for SIGCOMM 2009 and CoNEXT 2014​, and TPC member/reviewer for many networking conferences and journals.